1. Field of the Invention
The present invention relates to a semiconductor apparatus that includes MEMS (Micro-Electro-Mechanical Systems) device and semiconductor devices, and a method for manufacturing the semiconductor apparatus.
2. Related Art
“MEMS (Micro-Electro-Mechanical Systems)” is a generic term for micro structures manufactured by silicon microfabrication processes. The MEMS are expected to be applied in various fields such as pressure sensors, acceleration sensors, ink jet printers, filters, and the likes. To construct a system with MEMS devices having such MEMS structures, it is necessary to integrate MEMS devices and other semiconductor devices (such as logic circuits, analog amplifiers, and memories) on the same substrate.
There are two methods for integration. One is so-called System-On-Chip (SOC), and all devices are formed directly on one chip, so as to achieve integration. By this method, high device integration can be achieved, and minute global wires that connect the devices can be formed, as all the devices are formed on one chip. Accordingly, higher integration and higher performance can be achieved, and a thinner package can be formed. However, this method has limits on the types of devices that can be integrated. For example, it is difficult to form devices made of a crystalline material such as GaAs on a silicon substrate, because of the differences in lattice constant and thermal expansion rate between silicon and GaAs. Also, devices such as LSIs that require very precise design and device that can be formed by a rough design plan cannot be efficiently produced in one process. Especially, when a new device is incorporated, all the procedures need to be changed. As a result, the costs for new device development become high, and the development period becomes inconveniently long.
The other method is so-called System-In Package (SIP). By this method, chips are formed independently of one another, and are divided and mounted on a substrate called an “interposer”. Since the devices can be formed independently of one another, there are fewer limits on the types of devices that can be integrated. Also, when a new system is developed, existing chips can be used. Accordingly, the development costs can be made lower, and the development period can be made shorter. However, by this method, higher density of chips, minute wires, and thinner packages are difficult to achieve, since the interposer and the chips are connected with bonding wires or bumps.
By an example modification of SIP, chips of different kinds that are formed independently of one another are mounted together on the same semiconductor substrate (see JP-A 2001-189424 (KOKAI)). By the technique disclosed in this patent document, a circuit having predetermined functions and one or more concave portions are formed on the semiconductor substrate, and semiconductor chips that are prepared beforehand are embedded in the concave portions. The technique disclosed in JP-A 2001-189424 (KOKAI) has limits on the shapes of the sections of the semiconductor chips, since the semiconductor chips are embedded in the concave portions. For example, it is difficult to embed the semiconductor chip, unless the section of each semiconductor chip is tapered. If the section of each semiconductor chip has a vertical form, it is difficult to embed the semiconductor chips. If the section of each semiconductor chip is reverse-tapered, the semiconductor chips cannot be embedded. This technique is unsuitable especially for complex structures such as MEMS.
By another example modification of SIP, two or more chips of different kinds are temporarily secured on an adhesive material. The chips are embedded by applying an adhesive agent over the chips, and are integrated by removing the adhesive agent (see JP-A 2005-268453 (KOKAI)). By the technique disclosed in JP-A 2005-268453 (KOKAI), the principal face of each chip (the device face) is located on the opposite side from the adhesive material. If chips with different thicknesses are mounted together, the distances from the surface of the adhesive material to the upper faces of the chips vary. As a result, the thickness of the passivation film on the chips varies, and a thicker passivation film is required. In a thick passivation film, it is difficult to form minute through holes.
Under such circumstances, more sophisticated functions, higher integration, lower costs, and thinner packages are also expected for the integration of MEMS devices and semiconductor devices. However, integration of MEMS devices has a few more problems. First of all, the structure of each MEMS device is complicated. Also, each MEMS device to be packaged needs to have a hollow structure. Therefore, it is necessary to form a cap on each MEMS device. The cap needs to have a thickness large enough to endure the hollow structure. For this reason, most MEMS devices are thicker and more complicated in shape than other semiconductor devices. When such devices are integrated, the resultant chip becomes thicker than a conventional chip, and wire connections become difficult.
As described above, when devices of different kinds are integrated by SOC, there are limits on the types of devices that can be integrated, and development costs are high. By SIP, high integration cannot be achieved, and it is difficult to reduce the size of the entire system and to make the package thinner. Particularly, when MEMS devices are integrated, high integration and a thinner package are even more difficult to achieve, because of the large thicknesses and complicated shapes of the MEMS devices.